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  • XC3568B2B核心板正面图片(1762850803107).png
  • XC3588CB核心板背.jpg

XC3588CB Core Board

This intelligent core board uses the new generation flagship chip RK3588, featuring an eight-core 64-bit big.LITTLE architecture with 4 Cortex-A76 cores and 4 Cortex-A55 cores; main frequency of 2.4GHz, advanced 8nm process, high performance, low power consumption, GPU: Mali-G610 MC4, 6TOPS AI computing power, gold finger design for easy plugging and unplugging, providing design reference circuits and technical support.

Category:

  • Product Description
  • CPUOcta-core 64-bit, 4*Cortex-A76 + 4*Cortex-A55, main frequency up to 2.4GHz
    MemoryDefault 4G (optional 4G/8G)
    StorageDefault 32G (optional 32G/64G/128G)
    Power Supply VoltageDC 5V
    Operating Temperature10°- 65°
    Interface TypeB2B connector (5*80pin, pin pitch 0.5mm, height 2mm)
    Function

    Quantity

    Parameters
    Wired Network

    2

    2 GMAC channels, providing RGMII / RMII interface output
    SDIO

    4

    1x8ch 12S/TDM, 2x2ch 12S, 1x8ch PDM
    Display Type
    LVDS/RGB

    1

    Single channel output, resolution up to 1280x800, multiplexed with MIPI-DSI0 channel
    EDP

    1

    Supports eDP 1.3, resolution up to 2560x1600@60Hz
    Mipi-Dsi

    1

    Single channel output resolution up to 1920x1080@60Hz; dual channel output resolution up to

    2560x1440@60Hz

    HDMI OUT

    1

    Resolution up to 1080p@120Hz or 4096x2304@60Hz
    Communication Type
    USB2.0

    1

    1 USB 2.0 Host, 1 USB 2.0 OTG, used for USB 3.0's 2.0 channel

    Can be used as 2 independent USB2.0 when USB3.0 is not used

    USB3.0

    2

    1 USB 3.0 Host, 1 USB 3.0 OTG
    Serial Port

    10

    Maximum speed 4Mbps
    IIC

    5

    Supports 7bits and 10bits address modes, maximum speed up to 1Mbit/s
    SATA

    3

    SATA 3.0, maximum speed 6.0Gb/s, supports eSATA
    PEM

    16

    32bits timer/counter
    SPI

    4

    Supports master-slave mode, software configurable
    CAN

    3

    Supports CAN2.0 B
    PCIE3.0

    2

    PCIe 3.0, 1x2 Lanes or 2x1 Lane, maximum speed 8.0Gbps per lane

    1 Lane supports Root Complex (RC) mode only

    2 Lanes support Root Complex (RC) and End Point (EP) modes

    PCIe2.1

    1

    PCIe 2.1 x1, maximum speed 5.0Gbps, RC mode

    Open Data

     

    Application Scenarios

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